diff -Naurp -X /home/jbarnes/dontdiff 080-ide-simulator-hacks.patch/arch/ia64/sn/fakeprom/fpmem.c 090-fakeprom-update.patch/arch/ia64/sn/fakeprom/fpmem.c --- 080-ide-simulator-hacks.patch/arch/ia64/sn/fakeprom/fpmem.c Mon Jan 5 21:09:14 2004 +++ 090-fakeprom-update.patch/arch/ia64/sn/fakeprom/fpmem.c Tue Jan 6 12:18:55 2004 @@ -1,5 +1,4 @@ /* - * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. @@ -17,8 +16,58 @@ * klconfig to efi_memmap */ + +/* + * Sometimes it is useful to build a fake prom with a memmap that matches another + * platform. There are restrictions on how successful you will be, but here + * are the instructions for what I have used in the past & had good luck: + * + * - compile a kernel for the target platform (like zx1) with the following + * set: + * #define EFI_DEBUG 1 # in arch/ia64/kernel/efi.c + * #define SRAT_DEBUG # in drivers/acpi/numa.c + * + * - this causes the kernel to dump the memmap & SRAT during boot. + * + * - copy the console output to a file. + * + * - run the following script with the file as input: + * + * #!/bin/sh + * + * awk ' + * /^mem/ { + * printf "\t{%s, %sUL, %sUL, %sUL},\n", $4, $7, $11, $12 + * } + * /SRAT Memory/ { + * if (srat != 1) print "SRAT" + * srat = 1 + * for (i=1; i<=0;i++) + * printf "%4d |%s|\n", i, $i + * printf "\t{%s, %sUL, %sUL, %sUL},\n", $4, $6, $8, $13 + * } + * BEGIN { + * FS="[ \[\)\(\t:=,-]" + * } ' + * + * - this converts the memmap & SRAT info into C code array initilization statements. + * + * - copy & paste the initialization statements into the arrays below. Look for + * comments "PASTE xxx HERE". In general, on the MEMMAP is present on most other + * systems. If you have an SRAT, you may need to hack the number of nodes in fw-emu. + * Good luck... + * + * - set "#define FAKE_MEMMAP 1 + * + * - When running medusa, make sure you set the node1_memory_config to cover the + * amount of memory that you are going to use. Also note that you can run the + * kernel in "alias" space (starts at phy adr 0). This is kinda tricky, though + */ + + #include #include +#include #include "fpmem.h" /* @@ -77,9 +126,9 @@ GetNumCpus(void) /* For SN, get the index th nasid */ int -GetNasid(int index) +GetNasid(int cnode) { - return sn_memmap[index].nasid ; + return sn_memmap[cnode].nasid ; } node_memmap_t @@ -94,6 +143,21 @@ IsCpuPresent(int cnode, int cpu) return sn_memmap[cnode].cpuconfig & (1UL<attribute = attr; } + +//#define FAKE_MEMMAP 1 +#ifdef FAKE_MEMMAP + +#define OFF 0x3000000000UL +struct { + unsigned long type; + unsigned long attr; + unsigned long start; + unsigned long end; +} mdx[] = { + /* PASTE SRAT HERE */ +}; + +struct srat { + unsigned long start; + unsigned long len; + unsigned long type; + unsigned long pxm; +} srat[] = { + + /* PASTE SRAT HERE */ + +}; + + + +void * +build_memory_srat(struct acpi_table_memory_affinity *ptr) +{ + int i; + int n = sizeof(srat)/sizeof(struct srat); + + for (i=0; iheader.type = ACPI_SRAT_MEMORY_AFFINITY; + ptr->header.length = sizeof(struct acpi_table_memory_affinity); + ptr->proximity_domain = srat[i].pxm; + ptr->base_addr_lo = srat[i].start & 0xffffffff; + ptr->length_lo = srat[i].len & 0xffffffff; + ptr->base_addr_hi = srat[i].start >> 32; + ptr->length_hi = srat[i].len >> 32; + ptr->memory_type = ACPI_ADDRESS_RANGE_MEMORY; + ptr->flags.enabled = 1; + ptr++; + } + return ptr; +} + +int +build_efi_memmap(void *md, int mdsize) +{ + int i; + + for (i=0; iheader.type = ACPI_SRAT_MEMORY_AFFINITY; + ptr->header.length = sizeof(struct acpi_table_memory_affinity); + ptr->proximity_domain = PROXIMITY_DOMAIN(nasid); + ptr->base_addr_lo = 0; + ptr->length_lo = 0; +#if defined(SGI_SN2) + ptr->base_addr_hi = (nasid<<6) | (3<<4); + ptr->length_hi = (MD_BANKSIZE*MD_BANKS_PER_NODE)>>32; +#endif + ptr->memory_type = ACPI_ADDRESS_RANGE_MEMORY; + ptr->flags.enabled = 1; + ptr++; + } + return ptr; +} + + int build_efi_memmap(void *md, int mdsize) { @@ -148,7 +315,6 @@ build_efi_memmap(void *md, int mdsize) int cnode,bank ; int nasid ; node_memmap_t membank_info ; - int bsize; int count = 0 ; long paddr, hole, numbytes; @@ -157,18 +323,9 @@ build_efi_memmap(void *md, int mdsize) nasid = GetNasid(cnode) ; membank_info = GetMemBankInfo(cnode) ; for (bank=0;bank>1) & 255) #define SN2_BANK_SIZE_SHIFT (MBSHIFT+6) /* 64 MB */ -#define BankPresent(bsize) (bsize<6) -#define BankSizeBytes(bsize) (BankPresent(bsize) ? 1UL<<((bsize)+SN2_BANK_SIZE_SHIFT) : 0) #define MD_BANKS_PER_NODE 4 #define MD_BANKSIZE (1UL << 34) + +#define MAX_SN_NODES 256 +#define MAX_LSAPICS 512 +#define MAX_CPUS_NODE 4 +#define MAX_CPUS (MAX_CPUS_NODE*MAX_SN_NODES) +#define CPUS_PER_FSB 2 +#define CPUS_PER_FSB_MASK (CPUS_PER_FSB-1) +#define MAX_NASID 2048 + #endif +#define FPROM_BUG() do {while (1);} while (0) + typedef struct sn_memmap_s { short nasid ; @@ -66,7 +71,9 @@ typedef struct sn_config_s sn_memmap_t memmap[1]; /* start of array */ } sn_config_t; +struct acpi_table_memory_affinity; +extern long base_nasid; extern void build_init(unsigned long); extern int build_efi_memmap(void *, int); @@ -74,3 +81,5 @@ extern int GetNumNodes(void); extern int GetNumCpus(void); extern int IsCpuPresent(int, int); extern int GetNasid(int); +extern void* build_memory_srat(struct acpi_table_memory_affinity *); +extern void GetLogicalCpu(int, int *, int *); diff -Naurp -X /home/jbarnes/dontdiff 080-ide-simulator-hacks.patch/arch/ia64/sn/fakeprom/fpromasm.S 090-fakeprom-update.patch/arch/ia64/sn/fakeprom/fpromasm.S --- 080-ide-simulator-hacks.patch/arch/ia64/sn/fakeprom/fpromasm.S Mon Jan 5 21:09:01 2004 +++ 090-fakeprom-update.patch/arch/ia64/sn/fakeprom/fpromasm.S Tue Jan 6 12:18:55 2004 @@ -1,5 +1,4 @@ /* - * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. @@ -253,9 +252,10 @@ initx: // Note: should verify that the interrupt we got was really the ap_wakeup // interrupt but this should not be an issue on medusa slave: - nop.i 0x8beef // Medusa - put cpu to sleep til interrupt occurs mov r8=cr.irr0;; // Check for interrupt pending. cmp.eq p6,p0=r8,r0 + ;; +(p6) nop.i 0x8beef // Medusa - put cpu to sleep til interrupt occurs (p6) br.cond.sptk slave;; mov r8=cr.ivr;; // Got one. Must read ivr to accept it @@ -361,6 +361,14 @@ static: cmp.eq p6,p7=6,r28 /* PAL_PTCE_ st8 [r3]=r2 ;; +1: cmp.eq p6,p7=34,r28 /* PAL_VM_PAGE_SIZE */ +(p7) br.cond.sptk.few 1f + movl r8=0 /* status = 0 */ + movl r9=0x015557000 /* insertable page sizes */ + movl r10=0x115557000 /* purgeable page sizes */ + movl r11=0 + ;; + 1: cmp.eq p6,p7=19,r28 /* PAL_RSE_INFO */ (p7) br.cond.sptk.few 1f movl r8=0 /* status = 0 */ diff -Naurp -X /home/jbarnes/dontdiff 080-ide-simulator-hacks.patch/arch/ia64/sn/fakeprom/fw-emu.c 090-fakeprom-update.patch/arch/ia64/sn/fakeprom/fw-emu.c --- 080-ide-simulator-hacks.patch/arch/ia64/sn/fakeprom/fw-emu.c Mon Jan 5 21:09:50 2004 +++ 090-fakeprom-update.patch/arch/ia64/sn/fakeprom/fw-emu.c Tue Jan 6 12:18:55 2004 @@ -4,36 +4,11 @@ * Copyright (C) 1998-2000 Hewlett-Packard Co * Copyright (C) 1998-2000 David Mosberger-Tang * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. * - * Copyright (C) 2000-2003 Silicon Graphics, Inc. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it would be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. - * - * Further, this software is distributed without any warranty that it is - * free of the rightful claim of any third person regarding infringement - * or the like. Any license provided herein, whether implied or - * otherwise, applies only to this software file. Patent licenses, if - * any, provided herein do not apply to combinations of this program with - * other software, or any other product whatsoever. - * - * You should have received a copy of the GNU General Public - * License along with this program; if not, write the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. - * - * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy, - * Mountain View, CA 94043, or: - * - * http://www.sgi.com - * - * For further information regarding this notice, see: - * - * http://oss.sgi.com/projects/GenInfo/NoticeExplan + * Copyright (C) 2000-2003 Silicon Graphics, Inc. All Rights Reserved. */ #include #include @@ -66,11 +41,12 @@ #define BOOT_SIG "BOOT" /* Boot table */ #define ACPI_SRAT_REVISION 1 #define ACPI_SLIT_REVISION 1 +#define ACPI_FADT_REVISION 3 +#define ACPI_DSDT_REVISION 1 #define OEMID "SGI" #ifdef SGI_SN2 #define PRODUCT "SN2" -#define PROXIMITY_DOMAIN(nasid) (((nasid)>>1) & 255) #endif #define MB (1024*1024UL) @@ -81,15 +57,6 @@ #define ABS(i) ((i) > 0 ? (i) : -(i)) #define ALIGN8(p) (((long)(p) +7) & ~7) -#define FPROM_BUG() do {while (1);} while (0) -#define MAX_SN_NODES 128 -#define MAX_LSAPICS 512 -#define MAX_CPUS 512 -#define MAX_CPUS_NODE 4 -#define CPUS_PER_NODE 4 -#define CPUS_PER_FSB 2 -#define CPUS_PER_FSB_MASK (CPUS_PER_FSB-1) - #define NUM_EFI_DESCS 2 #define RSDP_CHECKSUM_LENGTH 20 @@ -126,11 +93,10 @@ typedef struct { */ long base_nasid; long num_cpus; -long bsp_entry_pc=0; +long bsp_entry_pc; long num_nodes; -long app_entry_pc; -int bsp_lid; func_ptr_t ap_entry; +char nasid_present[MAX_NASID]; extern void pal_emulator(void); @@ -141,8 +107,11 @@ static char fw_mem[( sizeof(efi_system_ + sizeof(struct ia64_sal_systab) + sizeof(struct ia64_sal_desc_entry_point) + sizeof(struct ia64_sal_desc_ap_wakeup) + + sizeof(struct ia64_sal_desc_platform_feature) + sizeof(struct acpi20_table_rsdp) + sizeof(struct acpi_table_xsdt) + + sizeof(acpi_table_header) /* dummy DSDT */ + + sizeof(fadt_descriptor_rev2) + sizeof(struct acpi_table_slit) + MAX_SN_NODES*MAX_SN_NODES+8 + sizeof(struct acpi_table_madt) @@ -200,7 +169,7 @@ efi_unimplemented (void) #ifdef SGI_SN2 #undef cpu_physical_id -#define cpu_physical_id(cpuid) ((ia64_getreg(_IA64_REG_CR_LID) >> 16) & 0xffff) +#define cpu_physical_id(cpuid) ((ia64_get_lid() >> 16) & 0xffff) void fprom_send_cpei(void) { @@ -224,14 +193,14 @@ fprom_send_cpei(void) { #endif -static struct sal_ret_values +static long sal_emulator (long index, unsigned long in1, unsigned long in2, unsigned long in3, unsigned long in4, unsigned long in5, unsigned long in6, unsigned long in7) { - long r9 = 0; - long r10 = 0; - long r11 = 0; + register long r9 asm ("r9") = 0; + register long r10 asm ("r10") = 0; + register long r11 asm ("r11") = 0; long status; /* @@ -242,7 +211,11 @@ sal_emulator (long index, unsigned long if (index == SAL_FREQ_BASE) { switch (in1) { case SAL_FREQ_BASE_PLATFORM: - r9 = 500000000; + /* slow down the clock on large systems to reduce the interrupt rate */ + if (num_cpus < 32) + r9 = 500000000UL; + else + r9 = 5000000000UL; break; case SAL_FREQ_BASE_INTERVAL_TIMER: @@ -324,7 +297,8 @@ sal_emulator (long index, unsigned long status = 2; } } else if (index == SN_SAL_GET_KLCONFIG_ADDR) { - r9 = 0x30000; + /* Okay .. so this is reserved at least in real PROM */ + r9 = (int) *(int *)(0xe000003000030000); } else if (index == SN_SAL_CONSOLE_PUTC) { status = -1; } else if (index == SN_SAL_CONSOLE_GETC) { @@ -332,13 +306,16 @@ sal_emulator (long index, unsigned long } else if (index == SN_SAL_CONSOLE_POLL) { status = -1; } else if (index == SN_SAL_SYSCTL_IOBRICK_MODULE_GET) { - status = -1; + if (in1 & 1) + r9 = RBT_TO_MODULE(1, 12, '^'); + else + status = -1; } else { status = -1; } asm volatile ("" :: "r"(r9), "r"(r10), "r"(r11)); - return ((struct sal_ret_values) {status, r9, r10, r11}); + return status; } @@ -446,7 +423,7 @@ acpi_checksum_rsdp20(struct acpi20_table } int -nasid_present(int nasid) +is_nasid_present(int nasid) { int cnode; for (cnode=0; cnodeentry[0] = __fwtab_pa(base_nasid, acpi_madt); acpi_xsdt->entry[1] = __fwtab_pa(base_nasid, acpi_slit); acpi_xsdt->entry[2] = __fwtab_pa(base_nasid, acpi_srat); - acpi_checksum(&acpi_xsdt->header, sizeof(struct acpi_table_xsdt) + 16); + acpi_xsdt->entry[3] = __fwtab_pa(base_nasid, acpi_fadt); + acpi_xsdt->entry[4] = __fwtab_pa(base_nasid, acpi_dsdt); + acpi_checksum(&acpi_xsdt->header, sizeof(struct acpi_table_xsdt) + 32); /* Set up the APIC table */ acpi_table_initx(&acpi_madt->header, APIC_SIG, 4, 1, 1); @@ -614,7 +593,7 @@ sys_fw_init (const char *args, int argle lsapic20->flags.enabled = 1; #if defined(SGI_SN2) lsapic20->eid = nasid&0xffff; - lsapic20->id = (cpu<<4) | (nasid>>16); + lsapic20->id = (cpu<<4) | (nasid>>8); #endif lsapic20 = (struct acpi_table_lsapic*) ((long)lsapic20+sizeof(struct acpi_table_lsapic)); } @@ -624,23 +603,10 @@ sys_fw_init (const char *args, int argle /* Set up the SRAT table */ acpi_table_initx(&acpi_srat->header, SRAT_SIG, 4, ACPI_SRAT_REVISION, 1); ptr = acpi_srat+1; - for (cnode=0; cnodeheader.type = ACPI_SRAT_MEMORY_AFFINITY; - srat_memory_affinity->header.length = sizeof(struct acpi_table_memory_affinity); - srat_memory_affinity->proximity_domain = PROXIMITY_DOMAIN(nasid); - srat_memory_affinity->base_addr_lo = 0; - srat_memory_affinity->length_lo = 0; -#if defined(SGI_SN2) - srat_memory_affinity->base_addr_hi = (nasid<<6) | (3<<4); - srat_memory_affinity->length_hi = (MD_BANKSIZE*MD_BANKS_PER_NODE)>>32; -#endif - srat_memory_affinity->memory_type = ACPI_ADDRESS_RANGE_MEMORY; - srat_memory_affinity->flags.enabled = 1; - } + ptr = build_memory_srat(ptr); + + /* Build processor SRAT */ for (cnode=0; cnodeflags.enabled = 1; #if defined(SGI_SN2) srat_cpu_affinity->lsapic_eid = nasid&0xffff; - srat_cpu_affinity->apic_id = (cpu<<4) | (nasid>>16); + srat_cpu_affinity->apic_id = (cpu<<4) | (nasid>>8); #endif } } acpi_checksum(&acpi_srat->header, (char*)ptr - (char*)acpi_srat); + acpi_table_initx(acpi_dsdt, DSDT_SIG, 4, ACPI_DSDT_REVISION, 1); + acpi_checksum(acpi_dsdt, sizeof(*acpi_dsdt)); + + /* Set up the FADT table */ + acpi_table_initx((struct acpi_table_header *)&acpi_fadt->header, FADT_SIG, 4, ACPI_FADT_REVISION, 1); + /* + * We don't have legacy PC keyboard support etc. + */ + acpi_fadt->iapc_boot_arch = 0; + acpi_fadt->Xdsdt = (u64)__fwtab_pa(base_nasid, acpi_dsdt); + acpi_checksum((struct acpi_table_header *)&acpi_fadt->header, + sizeof(*acpi_fadt)); /* Set up the SLIT table */ acpi_table_initx(&acpi_slit->header, SLIT_SIG, 4, ACPI_SLIT_REVISION, 1); @@ -668,8 +646,10 @@ sys_fw_init (const char *args, int argle memset(cp, 255, acpi_slit->localities*acpi_slit->localities); for (i=0; i<=max_nasid; i++) + nasid_present[i] = is_nasid_present(i); + for (i=0; i<=max_nasid; i++) for (j=0; j<=max_nasid; j++) - if (nasid_present(i) && nasid_present(j)) + if (nasid_present[i] && nasid_present[j]) *(cp+PROXIMITY_DOMAIN(i)*acpi_slit->localities+PROXIMITY_DOMAIN(j)) = 10 + MIN(254, 5*ABS(i-j)); cp = acpi_slit->entry + acpi_slit->localities*acpi_slit->localities; @@ -681,7 +661,7 @@ sys_fw_init (const char *args, int argle sal_systab->size = sizeof(*sal_systab); sal_systab->sal_rev_minor = 1; sal_systab->sal_rev_major = 0; - sal_systab->entry_count = 3; + sal_systab->entry_count = 4; sal_systab->sal_b_rev_major = 0x1; /* set the SN SAL rev to */ sal_systab->sal_b_rev_minor = 0x0; /* 1.00 */ @@ -730,6 +710,10 @@ sys_fw_init (const char *args, int argle sal_apwake->mechanism = IA64_SAL_AP_EXTERNAL_INT; sal_apwake->vector = 18; + /* Setup the SAL feature descriptor */ + sal_feature->type = SAL_DESC_PLATFORM_FEATURE; + sal_feature->feature_mask = IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT; + for (checksum=0, cp=(char*)sal_systab; cp < (char *)efi_memmap; ++cp) checksum += *cp; sal_systab->checksum = -checksum; @@ -754,22 +738,4 @@ sys_fw_init (const char *args, int argle bp->console_info.orig_x = 0; bp->console_info.orig_y = 24; bp->fpswa = 0; - - /* - * Now pick the BSP & store it LID value in - * a global variable. Note if BSP is greater than last cpu, - * pick the last cpu. - */ - for (cnode=0; cnode 0) - continue; - return; - } - } } diff -Naurp -X /home/jbarnes/dontdiff 080-ide-simulator-hacks.patch/arch/ia64/sn/fakeprom/klgraph_fake.c 090-fakeprom-update.patch/arch/ia64/sn/fakeprom/klgraph_fake.c --- 080-ide-simulator-hacks.patch/arch/ia64/sn/fakeprom/klgraph_fake.c Wed Dec 31 16:00:00 1969 +++ 090-fakeprom-update.patch/arch/ia64/sn/fakeprom/klgraph_fake.c Tue Jan 6 12:18:55 2004 @@ -0,0 +1,373 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2003 Silicon Graphics, Inc. All Rights Reserved. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +typedef union ia64_nasid_va { + struct { +#if defined(SGI_SN2) + unsigned long off : 36; /* intra-region offset */ + unsigned long attr : 2; + unsigned long nasid : 11; /* NASID */ + unsigned long off2 : 12; /* fill */ + unsigned long reg : 3; /* region number */ +#endif + } f; + unsigned long l; + void *p; +} ia64_nasid_va; + +#if defined(SGI_SN2) +#define __fwtab_pa(n,x) ({ia64_nasid_va _v; _v.l = (long) (x); _v.f.nasid = (x) ? (n) : 0; _v.f.reg = 0; _v.f.attr = 3; _v.l;}) +#endif + +#define brd_widgetnum brd_slot +void klgraph_fake(void); + +/* + * If you need to add a new lboard or a compartment, put + * here! + */ +kl_config_hdr_t kl_config_hdr; +int *klconfig_start = (int *)0x30000; + +static lboard_t nasid0_lboard_0; +static klcomp_t nasid0_hub_comp; +static klcomp_t nasid0_xbow_comp; + +static lboard_t nasid0_lboard_1; + +static lboard_t nasid0_lboard_2; +static klcomp_t nasid0_lboard_2_comp0; + +static lboard_t nasid0_lboard_3; +static klcomp_t nasid0_lboard_3_comp0; + +static lboard_t nasid1_lboard_0; +static lboard_t nasid1_lboard_1; +static klcomp_t nasid1_hub_comp; + +/* + * klgraph_fake - Initialize dummy klconfig structures for fake prom. + */ +void +klgraph_fake() +{ + + *klconfig_start = (int) __fwtab_pa(0, &kl_config_hdr); + + /* + * This came from a dump of the klconfig from rappel. + * Nasid 1 is a TIO Module. + */ + + kl_config_hdr.ch_magic = 0x00000000beedbabe; /* set this to KLCFGINFO_MAGIC */ + kl_config_hdr.ch_board_info = __fwtab_pa(0, (klconf_off_t)&nasid0_lboard_0); + + + /* + * Define the lboardsfor Nasid 0. + */ + nasid0_lboard_0.brd_type = KLTYPE_SNIA; + nasid0_lboard_0.struct_type = 0x1; + nasid0_lboard_0.brd_widgetnum = 0x0; + /* nasid0_lboard_0.brd_geoid = module/001c11/slab/1/node */ + nasid0_lboard_0.brd_geoid.node.any.slab = 0; + nasid0_lboard_0.brd_geoid.node.any.type = GEO_TYPE_NODE; + nasid0_lboard_0.brd_geoid.node.any.module = RBT_TO_MODULE(1, 11, 'c'); + nasid0_lboard_0.brd_numcompts = 0x1; + nasid0_lboard_0.brd_compts[0] = __fwtab_pa(0, (klconf_off_t)&nasid0_hub_comp); + nasid0_lboard_0.brd_compts[1] = 0x0; + nasid0_lboard_0.brd_nic = 0xffffffff; + nasid0_lboard_0.brd_nasid = 0x0; + nasid0_lboard_0.brd_name[0] = 'I'; + nasid0_lboard_0.brd_name[1] = 'P'; + nasid0_lboard_0.brd_name[2] = '4'; + nasid0_lboard_0.brd_name[3] = '1'; + nasid0_lboard_0.brd_flags = 0x1; + nasid0_lboard_0.brd_next_any = __fwtab_pa(0, (klconf_off_t)&nasid0_lboard_1); + nasid0_lboard_0.brd_next_same = __fwtab_pa(0, (klconf_off_t)&nasid0_lboard_1); + nasid0_lboard_0.brd_next_same_host = 0x0; + nasid0_lboard_0.brd_partition = 0x0; + + /* + * Hub definition. + */ + nasid0_hub_comp.kc_hub.hub_info.struct_type = KLSTRUCT_HUB; + nasid0_hub_comp.kc_hub.hub_info.revision = 0x2; + nasid0_hub_comp.kc_hub.hub_info.nasid = 0x0; + nasid0_hub_comp.kc_hub.hub_info.errinfo = 0x0; + nasid0_hub_comp.kc_hub.hub_info.flags = 0x1; + nasid0_hub_comp.kc_hub.hub_info.virtid = 0x1; + nasid0_hub_comp.kc_hub.hub_info.physid = 0x0; + nasid0_hub_comp.kc_hub.hub_flags = 0x0; + nasid0_hub_comp.kc_hub.hub_box_nic = 0x0; + nasid0_hub_comp.kc_hub.hub_mfg_nic = 0x41d4230; + nasid0_hub_comp.kc_hub.hub_speed = 0xc8; + nasid0_hub_comp.kc_hub.hub_io_module = 0x0; + nasid0_hub_comp.kc_hub.hub_port[1].port_nasid = 0x1; /* Connected to TIO */ + nasid0_hub_comp.kc_hub.hub_port[1].port_num = 0x1; + nasid0_hub_comp.kc_hub.hub_port[1].port_flag = 0x0; + nasid0_hub_comp.kc_hub.hub_port[1].port_offset = 0x4194e80; /* Needs to be an address */ + + /* connecting geo = module/001c11/slab/1/node */ + + nasid0_hub_comp.kc_hub.hub_port[2].port_nasid = -1; + nasid0_hub_comp.kc_hub.hub_port[2].port_num = 0x0; + nasid0_hub_comp.kc_hub.hub_port[2].port_flag = 0x0; + nasid0_hub_comp.kc_hub.hub_port[2].port_offset = 0x0; + + + /* + * lboard for Xbow. + */ + nasid0_lboard_1.brd_type = KLTYPE_IOBRICK_XBOW; + nasid0_lboard_1.struct_type = 0x1; + nasid0_lboard_1.brd_widgetnum = 0x0; + nasid0_lboard_1.brd_geoid.node.any.slab = 0; + nasid0_lboard_1.brd_geoid.node.any.type = GEO_TYPE_NODE; + /* nasid0_lboard_0.brd_geoid.node.any.module = ; */ + nasid0_lboard_1.brd_numcompts = 0x1; + nasid0_lboard_1.brd_compts[0] = __fwtab_pa(0, (klconf_off_t)&nasid0_xbow_comp); + nasid0_lboard_1.brd_compts[1] = 0x0; + nasid0_lboard_1.brd_nic = 0xffffffff; + nasid0_lboard_1.brd_nasid = 0x0; + nasid0_lboard_1.brd_name[0] ='I'; + nasid0_lboard_1.brd_name[0] ='O'; + nasid0_lboard_1.brd_name[0] ='B'; + nasid0_lboard_1.brd_name[0] ='R'; + nasid0_lboard_1.brd_name[0] ='I'; + nasid0_lboard_1.brd_name[0] ='C'; + nasid0_lboard_1.brd_name[0] ='K'; + nasid0_lboard_1.brd_flags = 0x1; + nasid0_lboard_1.brd_next_any = __fwtab_pa(0, (klconf_off_t)&nasid0_lboard_2); + nasid0_lboard_1.brd_next_same = __fwtab_pa(0, (klconf_off_t)&nasid0_lboard_2); + nasid0_lboard_1.brd_next_same_host = 0x0; + nasid0_lboard_1.brd_partition = 0x1; + + nasid0_xbow_comp.kc_xbow.xbow_info.struct_type = KLSTRUCT_XBOW; + nasid0_xbow_comp.kc_xbow.xbow_info.revision = 0x2; + nasid0_xbow_comp.kc_xbow.xbow_info.nasid = 0x0; + nasid0_xbow_comp.kc_xbow.xbow_info.errinfo = 0x0; + nasid0_xbow_comp.kc_xbow.xbow_info.flags = 0x1; + nasid0_xbow_comp.kc_xbow.xbow_info.virtid = 0x0; + nasid0_xbow_comp.kc_xbow.xbow_info.physid = 0xff; + nasid0_xbow_comp.kc_xbow.xbow_master_hub_link= 0xa; + + /* XBOW LINK NUMBER a */ + nasid0_xbow_comp.kc_xbow.xbow_port_info[2].port_nasid= 0x0; + nasid0_xbow_comp.kc_xbow.xbow_port_info[2].port_flag= 0x6; + nasid0_xbow_comp.kc_xbow.xbow_port_info[2].port_offset= 0x0; + + /* XBOW LINK NUMBER c */ + nasid0_xbow_comp.kc_xbow.xbow_port_info[4].port_nasid= 0x0; + nasid0_xbow_comp.kc_xbow.xbow_port_info[4].port_flag= 0x5; + nasid0_xbow_comp.kc_xbow.xbow_port_info[4].port_offset= 0x0; + + /* XBOW LINK NUMBER d */ + nasid0_xbow_comp.kc_xbow.xbow_port_info[5].port_nasid= 0x0; + nasid0_xbow_comp.kc_xbow.xbow_port_info[5].port_flag= 0x5; + nasid0_xbow_comp.kc_xbow.xbow_port_info[5].port_offset= 0x0; + + /* XBOW LINK NUMBER f */ + nasid0_xbow_comp.kc_xbow.xbow_port_info[7].port_nasid= 0x0; + nasid0_xbow_comp.kc_xbow.xbow_port_info[7].port_flag= 0x5; + nasid0_xbow_comp.kc_xbow.xbow_port_info[7].port_offset= 0x0; + + /* + * Lboard for Widget C Bus 0 + */ + nasid0_lboard_2.brd_type = KLTYPE_IXBRICK; + nasid0_lboard_2.struct_type = 0x1; + nasid0_lboard_2.brd_widgetnum = 0xc; + /* nasid0_lboard_1.brd_geoid = module/001c11 */ + nasid0_lboard_2.brd_numcompts = 0x1; + nasid0_lboard_2.brd_nic = 0x0; + nasid0_lboard_2.brd_nasid = 0x0; + nasid0_lboard_2.brd_name[0] = 'I'; + nasid0_lboard_2.brd_name[1] = 'X'; + nasid0_lboard_2.brd_name[2] = 'b'; + nasid0_lboard_2.brd_name[3] = 'r'; + nasid0_lboard_2.brd_name[4] = 'i'; + nasid0_lboard_2.brd_name[5] = 'c'; + nasid0_lboard_2.brd_name[6] = 'k'; + + nasid0_lboard_2.brd_flags = 0x11; + nasid0_lboard_2.brd_next_any = __fwtab_pa(0, (klconf_off_t)&nasid0_lboard_3); + nasid0_lboard_2.brd_next_same = __fwtab_pa(0, (klconf_off_t)&nasid0_lboard_3); + nasid0_lboard_2.brd_next_same_host = 0x0; + nasid0_lboard_2.brd_partition = 0x1; + + nasid0_lboard_2_comp0.kc_bri.bri_info.struct_type = KLSTRUCT_BRI; + nasid0_lboard_2_comp0.kc_bri.bri_info.revision = 0x2; + nasid0_lboard_2_comp0.kc_bri.bri_info.nasid = 0x0; + nasid0_lboard_2_comp0.kc_bri.bri_info.errinfo = 0x0; + nasid0_lboard_2_comp0.kc_bri.bri_info.flags = 0x1; + nasid0_lboard_2_comp0.kc_bri.bri_info.virtid = 0x2c; + nasid0_lboard_2_comp0.kc_bri.bri_info.physid = 0xc; + +#if MAYBE +nasid0_lboard_1_comp1.kc_ioc3.ioc3_info.struct_type(Address 0xb004198be8)= Tigon3 GigE(0x27) +nasid0_lboard_1_comp1.kc_ioc3.ioc3_info.revision = 0x15 +nasid0_lboard_1_comp1.kc_ioc3.ioc3_info.nasid = 0x0 +nasid0_lboard_1_comp1.kc_ioc3.ioc3_info.errinfo = 0x41be808 +nasid0_lboard_1_comp1.kc_ioc3.ioc3_info.flags = 0x35 +nasid0_lboard_1_comp1.kc_ioc3.ioc3_info.virtid = 0x1 +nasid0_lboard_1_comp1.kc_ioc3.ioc3_info.physid = 0x4 + +nasid0_lboard_1_comp2.kc_ioc3.ioc3_info.struct_type(Address 0xb004199080)= SCSI(0x25) +nasid0_lboard_1_comp2.kc_ioc3.ioc3_info.revision = 0x6 +nasid0_lboard_1_comp2.kc_ioc3.ioc3_info.nasid = 0x0 +nasid0_lboard_1_comp2.kc_ioc3.ioc3_info.errinfo = 0x0 +nasid0_lboard_1_comp2.kc_ioc3.ioc3_info.flags = 0x31 +nasid0_lboard_1_comp2.kc_ioc3.ioc3_info.virtid = 0xffffffff +nasid0_lboard_1_comp2.kc_ioc3.ioc3_info.physid = 0x3 + +nasid0_lboard_1_comp3.kc_ioc3.ioc3_info.struct_type(Address 0xb004199518)= IOC4(0x29) +nasid0_lboard_1_comp3.kc_ioc3.ioc3_info.revision = 0x4f +nasid0_lboard_1_comp3.kc_ioc3.ioc3_info.nasid = 0x0 +nasid0_lboard_1_comp3.kc_ioc3.ioc3_info.errinfo = 0x0 +nasid0_lboard_1_comp3.kc_ioc3.ioc3_info.flags = 0x11 +nasid0_lboard_1_comp3.kc_ioc3.ioc3_info.virtid = 0xffffffff +nasid0_lboard_1_comp3.kc_ioc3.ioc3_info.physid = 0x1 + +nasid0_lboard_1_comp4.kc_ioc3.ioc3_info.struct_type(Address 0xb0041999b0)= IOC4_ATA(0x2e) +nasid0_lboard_1_comp4.kc_ioc3.ioc3_info.revision = 0x4f +nasid0_lboard_1_comp4.kc_ioc3.ioc3_info.nasid = 0x0 +nasid0_lboard_1_comp4.kc_ioc3.ioc3_info.errinfo = 0x0 +nasid0_lboard_1_comp4.kc_ioc3.ioc3_info.flags = 0x31 +nasid0_lboard_1_comp4.kc_ioc3.ioc3_info.virtid = 0xffffffff +nasid0_lboard_1_comp4.kc_ioc3.ioc3_info.physid = 0x1 +#endif + + /* + * Lboard for Widget C - Bus 1 + */ + nasid0_lboard_3.brd_type = KLTYPE_IXBRICK; + nasid0_lboard_3.struct_type = 0x1; + nasid0_lboard_3.brd_widgetnum = 0x0; + /* nasid0_lboard_2.brd_geoid = module/001c11; */ + nasid0_lboard_3.brd_numcompts = 0x1; + nasid0_lboard_3.brd_nic = 0x52082f17; + nasid0_lboard_3.brd_nasid = 0x0; + nasid0_lboard_3.brd_name[0] = 'I'; + nasid0_lboard_3.brd_name[1] = 'X'; + nasid0_lboard_3.brd_name[2] = 'b'; + nasid0_lboard_3.brd_name[3] = 'r'; + nasid0_lboard_3.brd_name[4] = 'i'; + nasid0_lboard_3.brd_name[5] = 'c'; + nasid0_lboard_3.brd_name[6] = 'k'; + nasid0_lboard_3.brd_flags = 0x1; + nasid0_lboard_3.brd_next_any = __fwtab_pa(0, (klconf_off_t)&nasid1_lboard_0); + nasid0_lboard_3.brd_next_same = __fwtab_pa(0, (klconf_off_t)&nasid1_lboard_0); + nasid0_lboard_3.brd_next_same_host = 0x0; + nasid0_lboard_3.brd_partition = 0x1; + + nasid0_lboard_3_comp0.kc_bri.bri_info.struct_type= KLSTRUCT_BRI; + nasid0_lboard_3_comp0.kc_bri.bri_info.revision = 0x2; + nasid0_lboard_3_comp0.kc_bri.bri_info.nasid = 0x0; + nasid0_lboard_3_comp0.kc_bri.bri_info.errinfo = 0x41be7f0; + nasid0_lboard_3_comp0.kc_bri.bri_info.flags = 0x1; + nasid0_lboard_3_comp0.kc_bri.bri_info.virtid = 0x2c; + nasid0_lboard_3_comp0.kc_bri.bri_info.physid = 0xc; + + /* lboard Address 0x3004194e80 */ + + nasid1_lboard_0.brd_type = KLTYPE_TIO; + nasid1_lboard_0.struct_type = 0x1; + nasid1_lboard_0.brd_widgetnum = 0x0; + /* nasid1_lboard_0.brd_geoid = module/001c11/slab/0/node */ + nasid1_lboard_0.brd_geoid.node.any.slab = 0; + nasid1_lboard_0.brd_geoid.node.any.type = GEO_TYPE_NODE; + nasid1_lboard_0.brd_geoid.node.any.module = RBT_TO_MODULE(1, 12, '^'); + + nasid1_lboard_0.brd_numcompts = 0x1; + nasid1_lboard_0.brd_compts[0] = __fwtab_pa(0, (klconf_off_t)&nasid1_hub_comp); + nasid1_lboard_0.brd_compts[1] = 0x0; + + nasid1_lboard_0.brd_nic = 0xffffffff; + nasid1_lboard_0.brd_nasid = 0x1; + nasid1_lboard_0.brd_name[0] = 'I'; + nasid1_lboard_0.brd_name[1] = 'P'; + nasid1_lboard_0.brd_name[2] = '4'; + nasid1_lboard_0.brd_name[3] = '1'; + nasid1_lboard_0.brd_flags = 0x1; + nasid1_lboard_0.brd_next_any = __fwtab_pa(0, (klconf_off_t)&nasid1_lboard_1); + nasid1_lboard_0.brd_next_same = __fwtab_pa(0, (klconf_off_t)&nasid1_lboard_1); + nasid1_lboard_0.brd_next_same_host = 0x0; + nasid1_lboard_0.brd_partition = 0x0; + + nasid1_hub_comp.kc_hub.hub_info.struct_type = 0x2; + nasid1_hub_comp.kc_hub.hub_info.revision = 0x2; + nasid1_hub_comp.kc_hub.hub_info.nasid = 0x1; + nasid1_hub_comp.kc_hub.hub_info.errinfo = 0x0; + nasid1_hub_comp.kc_hub.hub_info.flags = 0x1; + nasid1_hub_comp.kc_hub.hub_info.virtid = 0x0; + nasid1_hub_comp.kc_hub.hub_info.physid = 0x0; + nasid1_hub_comp.kc_hub.hub_flags = 0x0; + nasid1_hub_comp.kc_hub.hub_box_nic = 0x0; + nasid1_hub_comp.kc_hub.hub_mfg_nic = 0x0; + nasid1_hub_comp.kc_hub.hub_speed = 0xc8; + nasid1_hub_comp.kc_hub.hub_io_module = 0x0; + nasid1_hub_comp.kc_hub.hub_port[1].port_nasid = 0x1; + nasid1_hub_comp.kc_hub.hub_port[1].port_num = 0x1; + nasid1_hub_comp.kc_hub.hub_port[1].port_flag = 0x0; + nasid1_hub_comp.kc_hub.hub_port[1].port_offset = 0x0; + + /* + * Lboard for CP 0 + */ + nasid1_lboard_1.brd_type = KLTYPE_PABRICK; + nasid1_lboard_1.struct_type = 0x0; + nasid1_lboard_1.brd_widgetnum = 0xc; + /* nasid0_lboard_1.brd_geoid = module/001c11 */ + nasid1_lboard_1.brd_geoid.node.any.slab = 0; + nasid1_lboard_1.brd_geoid.node.any.type = GEO_TYPE_NODE; + nasid1_lboard_1.brd_geoid.node.any.module = RBT_TO_MODULE(1, 12, '^'); + nasid1_lboard_1.brd_numcompts = 0x1; + nasid1_lboard_1.brd_nic = 0x0; + nasid1_lboard_1.brd_nasid = 0x1; + nasid1_lboard_1.brd_name[0] = 'P'; + nasid1_lboard_1.brd_name[1] = 'A'; + nasid1_lboard_1.brd_name[2] = 'b'; + nasid1_lboard_1.brd_name[3] = 'r'; + nasid1_lboard_1.brd_name[4] = 'i'; + nasid1_lboard_1.brd_name[5] = 'c'; + nasid1_lboard_1.brd_name[6] = 'k'; + nasid1_lboard_1.brd_next_any = 0x0; + nasid1_lboard_1.brd_next_same = 0x0; + nasid1_lboard_1.brd_next_same_host = 0x0; + + + +#if 0 +/* connecting geo = module/001c11/slab/1/node */ + +nasid1_hub_comp.hub_port[2].port_nasid = 0xffffffff +nasid1_hub_comp.hub_port[2].port_num = 0x0 +nasid1_hub_comp.hub_port[2].port_flag = 0x0 +nasid1_hub_comp.hub_port[2].port_offset = 0x0 +#endif +} diff -Naurp -X /home/jbarnes/dontdiff 080-ide-simulator-hacks.patch/arch/ia64/sn/fakeprom/klgraph_init.c 090-fakeprom-update.patch/arch/ia64/sn/fakeprom/klgraph_init.c --- 080-ide-simulator-hacks.patch/arch/ia64/sn/fakeprom/klgraph_init.c Mon Jan 5 21:08:40 2004 +++ 090-fakeprom-update.patch/arch/ia64/sn/fakeprom/klgraph_init.c Tue Jan 6 12:18:55 2004 @@ -1,5 +1,4 @@ -/* $Id: klgraph_init.c,v 1.1 2002/02/28 17:31:25 marcelo Exp $ - * +/* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. @@ -26,7 +25,6 @@ #include #include #include -#include #include #include #include diff -Naurp -X /home/jbarnes/dontdiff 080-ide-simulator-hacks.patch/arch/ia64/sn/fakeprom/main.c 090-fakeprom-update.patch/arch/ia64/sn/fakeprom/main.c --- 080-ide-simulator-hacks.patch/arch/ia64/sn/fakeprom/main.c Mon Jan 5 21:09:19 2004 +++ 090-fakeprom-update.patch/arch/ia64/sn/fakeprom/main.c Tue Jan 6 12:18:55 2004 @@ -1,5 +1,4 @@ /* - * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. @@ -12,90 +11,58 @@ #include #include #include +#include +#include "fpmem.h" -extern void klgraph_init(void); -void bedrock_init(int); -void synergy_init(int, int); -void sys_fw_init (const char *args, int arglen, int bsp); - -volatile int bootmaster=0; /* Used to pick bootmaster */ -volatile int nasidmaster[128]={0}; /* Used to pick node/synergy masters */ -int init_done=0; -extern int bsp_lid; - -#define get_bit(b,p) (((*p)>>(b))&1) +extern void klgraph_fake(void); +void sys_fw_init (const char *args, int arglen); int fmain(int lid, int bsp) { - int syn, nasid, cpu; + int nasid, cpu, mynasid, mycpu, bootmaster; /* - * First lets figure out who we are. This is done from the - * LID passed to us. - */ - nasid = (lid>>16)&0xfff; - cpu = (lid>>28)&3; - syn = 0; - - /* - * Now pick a nasid master to initialize Bedrock registers. + * * Pass the parameter base address to the build_efi_xxx routines. */ - if (test_and_set_bit(8, &nasidmaster[nasid]) == 0) { - bedrock_init(nasid); - test_and_set_bit(9, &nasidmaster[nasid]); - } else - while (get_bit(9, &nasidmaster[nasid]) == 0); - +#if defined(SGI_SN2) + build_init(0x3000000000UL | ((long)base_nasid<<38)); +#endif /* - * Now pick a BSP & finish init. + * First lets figure out who we are. This is done from the + * LID passed to us. */ - if (test_and_set_bit(0, &bootmaster) == 0) { - sys_fw_init(0, 0, bsp); - test_and_set_bit(1, &bootmaster); - } else - while (get_bit(1, &bootmaster) == 0); - - return (lid == bsp_lid); -} - + mynasid = (lid>>16)&0xfff; + mycpu = (lid>>28)&3; -void -bedrock_init(int nasid) -{ - nasid = nasid; /* to quiet gcc */ -#if 0 /* - * Undef if you need fprom to generate a 1 node klgraph - * information .. only works for 1 node for nasid 0. + * Determine if THIS cpu is the bootmaster. The parameter + * is the logical cpu of the bootmaster. Cpus are numbered + * low-to-high nasid/lid. */ - klgraph_init(); -#endif -} - - -void -synergy_init(int nasid, int syn) -{ - long *base; - long off; - + GetLogicalCpu(bsp, &nasid, &cpu); + bootmaster = (mynasid == nasid) && (mycpu == cpu); + /* - * Enable all FSB flashed interrupts. - * I'd really like defines for this...... - */ - base = (long*)0x80000e0000000000LL; /* base of synergy regs */ - for (off = 0x2a0; off < 0x2e0; off+=8) /* offset for VEC_MASK_{0-3}_A/B */ - *(base+off/8) = -1LL; + * Initialize SAL & EFI tables. + * Note: non-bootmaster cpus will return to the slave loop + * in fpromasm.S. They spin there until they receive an + * external interrupt from the master cpu. + */ + if (bootmaster) { + /* + * Undef if you need fprom to generate a 1 node klgraph + * information .. only works for 1 node for nasid 0. + */ + klgraph_fake(); + sys_fw_init(0, 0); + } - /* - * Set the NASID in the FSB_CONFIG register. - */ - base = (long*)0x80000e0000000450LL; - *base = (long)((nasid<<16)|(syn<<9)); + return (bootmaster); } + /* Why isnt there a bcopy/memcpy in lib64.a */ void*